Q:1 , exam 2006
answer : slide 9 in ch 13
Q:2, exam 2006
answer : slide 12 in ch 13
DMA increases system concurrency by allowing the CPU
to perform tasks while the DMA system transfers data via the system
and memory buses. Hardware design is complicated because the DMA
controller must be integrated into the system, and the system must
allow the DMA controller to be a bus master. Cycle stealing may also
be necessary to allow the CPU and DMA controller to share use of the
Q.3.2006 Define (Location transparency,Location independence)
1. Location transparency. The name of a file does not reveal any hint of the
file's physical storage location.
2. Location independence. The name of a file does not need to be changed
when the file's physical storage location changes.
Q.4.2006 (A Comparison of Caching and Remote Service)
slides 14,15 in chapter 7
Q:5 ,exam 2006) What are the main differences between capability lists and access lists?
answer: An access list is a list for each object consisting of the domains
with a nonempty set of access rights for that object. A capability list is
a list of objects and the operations allowed on those objects for each
Q:6 , exam 2006 ) What protection problems may arise if a shared stack is used for parameter
answer: The contents of the stack could be compromised by other
process(es) sharing the stack.
Q:7, exam 2006)
Q:8, exam 2006)
answer: i think slide 8 in chapter 15 is the answer of this Q
Q:9,10,11 exam 2006)
answer : slide 9 in ch 13
Q3:What problems could occur if a system allowed a file system to be
mounted simultaneously at more than one location?
answer: There would be multiple paths to the same file, which could
confuse users or encourage mistakes (deleting a file with one path
deletes the file in all the other paths).
answer : slide 21 + 24 in ch 13
answer : 1- The host repeatedly reads the busy bit until that bit becomes clear.
2-the host sets the write , bit in the command register and writes abyte into the data-out register
3- the host sets the commend-ready bit .
4- when the controller notics that the command-ready bit is set , it sets the busy bit .
5- the controller reads the command register and see the write command
it reads the data out the register to get the byte and does the I/O device.
6- The controller clears the command-ready bit , clears the error bit in the stauts register to
indicate that the device I/O succeeded , and clears the busy bit to indicat that it is finished .
Q7:Capability lists are usually kept within the address space of the user.
How does the system ensure that the user cannot modify the contents
of the list?
answer: A capability list is considered a “protected object” and is
accessed only indirectly by the user. The operating system ensures the
user cannot access the capability list directly
Q8:when a program written by one user may be used by another user , an unexpected behavior may ensure describe briefy common methods by which such behavior accurs ?
answer:If these programs are executed in a domain that
provides the access rights of the executing user, the other users may misuse
Q2:List four ways a system could use to determine which sectors are free.
Give advantages of each way.
Free-space list. Each section indicates a sector that is available. Not encumbered by a used-sector list.
Bit vector is a compact version. Has no links that can be broken.
Link all free sectors together in an available list. Takes no usable space. But links could break.
List giving start of each block of free sectors, and a count of number of sectors in this block. This is fast for use in contiguous storage search.
عدل سابقا من قبل Abd El-Hamid IbrahiM في الأحد 7 يونيو 2009 - 0:15 عدل 4 مرات (السبب : add answer)